Fitter error.

[Altera_Forum]

Hi, 

 I am getting an error in the fitter: Error: Differential I/O input pin CLK_155_P is assigned to a non differential location J38. However, it must be assigned to a differential input location   Currently this pins have no internal connection, I will need them eventually. This input pins have the following assignment as per the dev kit Stratix IV GX reference manual (p. 2-22, 2-23)   http://www.altera.com/literature/manual/rm_sivgx_fpga_dev_board.pdf   - Location = J2, AA2, AL2, ... (respectively) - I/O Standard = LVDS ... (Diff. LVPECL for CLK_155_P) - Input Termination = OCT 100 Ohms (where applicable)   May I know how to get rid of this error? Do I need to do any assignment in order to get the design compile?   Thanks a lot for the help provided in advance,

[Altera_Forum]

With Stratix IV, you can't have unused pins assigned to Transceiver pins or reference clock pins. You need to comment them out of your design until you are ready to use them. 

 Jake