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JTAG Configure problem on Brand New STRATIX 10L DVK during Manual & BTS based Programming

MIT_R_D
New Contributor I
719 Views

We brought new S10 board and that reached Bangalore yesterday.

DVK Mouser Link: https: //www.mouser.in/ProductDetail/Intel/DK-SOC-1SSX-L-D?qs=sGAEpiMZZMurtJ7VwBTl0eTtlnPkllW0UmtfpqDzeaJsCzBDaKA6dA==


We Planned to test the initial functionality of new S10 Board By Using BTS we are getting following error with example projects.

Velu_0-1622445893825.png


We created new project for LED Blanking and try to program the sof file. we are getting following error messages

 Error(18950): Device has stopped receiving configuration data Error(18948): Error message received from device: Detected hardware access error. There is a failure in accessing external hardware. (Subcode 0x0032, Info 0x00000000, Location 0x0000C400) Error(20072): A PMBUS error has occurred during configuration. Potential errors: Incorrect VID setting in Quartus Project. The target device fails to communicate to smart regulator or PMBUS Master on board. Error(209012): Operation failed 

We have followed https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-pwr.pdf
and changed Configuration Pins

Velu_1-1622446526867.png


Switch Position:

SW1: OFF OFF ON ON ON ON ON ON

SW2: ON ON ON ON

SW3: OFF OFF OFF OFF

SW4: ON OFF ON OFF



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8 Replies
YuanLi_S_Intel
Employee
667 Views

Hi,


Can you try to change the QSF setting to below?

set_global_assignment -name USE_PWRMGT_SCL SDM_IO0

set_global_assignment -name USE_PWRMGT_SDA SDM_IO16

set_global_assignment -name PWRMGT_BUS_SPEED_MODE "100 KHZ"


set_global_assignment -name PWRMGT_SLAVE_DEVICE_TYPE LTM4677

set_global_assignment -name PWRMGT_PAGE_COMMAND_ENABLE ON

set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "AUTO DISCOVERY"

set_global_assignment -name PWRMGT_TRANSLATED_VOLTAGE_VALUE_UNIT VOLTS


set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 47

set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 00

set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 00

set_global_assignment -name PWRMGT_SLAVE_DEVICE3_ADDRESS 00

set_global_assignment -name PWRMGT_SLAVE_DEVICE4_ADDRESS 00

set_global_assignment -name PWRMGT_SLAVE_DEVICE5_ADDRESS 00

set_global_assignment -name PWRMGT_SLAVE_DEVICE6_ADDRESS 00

set_global_assignment -name PWRMGT_SLAVE_DEVICE7_ADDRESS 00


Regards,

Bruce


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MIT_R_D
New Contributor I
660 Views

Hi Bruce,

Thanks for the response.
We  changed the QSF setting and tried. But outcome is same(Still we are getting same errors during programming).

Velu_0-1622799333893.png

 

Velu_1-1622799516110.png

 



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MIT_R_D
New Contributor I
654 Views

To addition to that, We were trying to open clock Controller and read the clock status on BTS. We are not able to access.  its shows connecting to the target Board.  But in BTS its shows Board connected

Velu_0-1622806407767.png

 

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MIT_R_D
New Contributor I
618 Views

@YuanLi_S_Intel 

any suggestion for me?
We are waiting for response.
is it hardware issue?
We are not able to use this dvk for development purpose.

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YuanLi_S_Intel
Employee
617 Views

It is weird as the QSF is working fine on my side.


Do you have other similar board? If the setting and BTS is working fine on the other S10 SX Board?


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MIT_R_D
New Contributor I
607 Views

@YuanLi_S_Intel 

We have one more Board, It is working fine for same setting and with BTS example Project.

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YuanLi_S_Intel
Employee
588 Views

Hi Velu,


Potentially the hardwire connection on the SDM_IO there. If the similar setup is working fine on another S10 SoC L Tile Development Kit but not this 1. Probably you may need to work with the distributor for exchange.


Regards,

Bruce


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MIT_R_D
New Contributor I
577 Views

Thanks @YuanLi_S_Intel 
We will check with Distributor for exchange

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