Jitters at counter output

[Altera_Forum]

Dear all, 

 I encountered strange jitter problems in my behavioral simulation.  I use register as a counter, then output the counter value, the simulations shows no jitter at register signal, however, there are jitters on the output pin. I don't understand why  Any one can help me?  The attached files are source code and simulation results.

[Altera_Forum]

Your output signal OE is a bus. When sending multiple signals out, they always have different propagation delays out. (We're down to the picosecond scale. There's no physical way to avoid this.) That's why you want to capture them in the downstream device when they're not switching.

[Altera_Forum]

Thanks, so you mean it is normal? 

but the simulation is not to picosecond scale yet, it is on ns scale.  Could you tell me what is 'downstream device'?  Thank you very much!    --- Quote Start ---  Your output signal OE is a bus. When sending multiple signals out, they always have different propagation delays out. (We're down to the picosecond scale. There's no physical way to avoid this.) That's why you want to capture them in the downstream device when they're not switching.  --- Quote End ---  

[Altera_Forum]

Completely normal. Even if you didn't see this in the simulation, you would in the device. And note that the device will have more variance than that simulation, which is probably only showing worst case delays. Every delay has a range over Process, Voltage and Temperature. The downstream device is what OE is sending it's data too.

[Altera_Forum]

In usual terminology, the observed effect is named delay skew, while jitter (or phase noise) is an accidental pulse-to-pulse variation.