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Altera_Forum
Honored Contributor I
837 Views

PCIE to DDR4

I have follow PCIE DMA Access to External Memory reference design, 

I program sof file to FPGA, and reboot. 

 

I can see device through PCIE by "lspci | grep Altera", 

however, every time I try to transport data from host to DDR, my computer crashed. 

 

can anyone tell me what's going on?
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2 Replies
Altera_Forum
Honored Contributor I
64 Views

I want to know if parameters in EMIF was wrong, will cause computer crash? 

or just get wrong data when transport to DDR? or lower bandwidth?
Altera_Forum
Honored Contributor I
64 Views

 

--- Quote Start ---  

I want to know if parameters in EMIF was wrong, will cause computer crash? 

or just get wrong data when transport to DDR? or lower bandwidth? 

--- Quote End ---  

 

 

I hope, By this time you might have fixed it. if yes, can you mention what went wrong ?? 

 

Its happened previously with ourselves as well. what i did was, instead of doing "start DMA" first time, i will disable one option either read dma or write dma and then i will select start dma then it works fine and displays data transfer time. Later , the code was entirely modified and able to send our algo data into ddr3.
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