SGDMA with pipeline bridge inside a Qsys subsystem

[Altera_Forum]

Hi 

 I'm trying to get an SGDMA core to run inside a QSys subsystem which has its own sgdma desc memory. And the subsystem is connected to the outside system with nios using an avalon mm pipeline bridge.  SGDMA isn't transferring data properly. The reason is that I dont think I am giving the SGDMA HAL the correct addresses.  {Main Top QSys Address range  NIOS CPU -> Avalon MM pipeline bridge ->    {Subsystem. with different address ranges inside.    SGDMA   descriptor_mem.  FIFO-MM. Source for SGDMA  FIFO-ST. Destination for SGDMA   }  }  I can access the SGDMA desc ram from the outside subsystem using the addresses in system.h.   But passing the same addresses to the sgdma hal would be incorrect as thats not the address range that it has right?  Can somebody give some general guidelines in such a situation?  ZubairLK

[Altera_Forum]

For those who read this later. 

 Just be careful about the source/destination addresses you give to the sgdma core. They have to be the ones marked as viewed by sgdma ip core in system.h  The descriptor address I used was initialized as follows  alt_sgdma_descriptor *transmit_descriptors = (alt_sgdma_descriptor *) SUBSYSTEM_1_SGDMA_DESC_BASE; // This is a memory inside the subsystem   It works.  Cheers ZubairLK