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Stratix III SEU Mitigation

Altera_Forum
Honored Contributor II
‎12-29-2008 05:04 PM
913 Views

Hi, 

have anyone used SEU Mitigation in stratix III or IV, specially EDERROR_INJECT command. 

I want to use this feature as Hardware-based SEU Injection tool. 

for one thing, I see that the sensitivity processor is a soft IP, but where is it? does it automatically inserted by Quartus in FPGA ? 

 

is there any sample or user-guide provided by altera ? all the resources I found from altera was an app. note plus white-paper and corresponding chapter in handbook. 

 

thanks in advance
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