Using an address to access registers

Altera_Forum · ‎07-13-2012

I have what seems to be a fairly common IO problem in FPGA hardware design. I'm designing an FPGA that will do a number of hardware functions for my CPU. Things like handling input bits, output bits, and several UARTs. I'm using a multiplexed 8 bit address/data bus to communicate with the FPGA.

To handle the communication with all the different hardware functions I am setting up a number of "registers", up to 256 of them, that I can write or read to control all the functions I design in.

The problem is how to manage and address that large set of data registers. I want to set up structures of named variables something like this:


struct packed {
   reg  firmware_version;
   reg  hardware_options_flags;
   reg  inputs;
   reg  outputs;
   reg  uart1_baud_rate;
   reg  uart1_data;
} registers;

Of course the final set of registers will be much larger, approaching 256 of them.

Then my CPU software will know that firmware_version is at address 0, and uart1_baud_rate is at address 4, and so on.

My question is how do I use the address that the CPU is sending to access a variable inside this packed structure?

I have tried to calculate the bit address range (something like 8*addr+7: 8*addr) but the compiler complains that its not a constant.

Is my only option to use a huge case statement with 256 different entries in it?

Altera_Forum · ‎07-13-2012

Short answer:

Yes, you need a big case.

Long answer:

SystemVerilog has unions, which might help, but they're not supported by Quartus.

That said, control registers are often "irregular" (some are read, some write, some read/write) and they often don't lend themselves to "regular" structures.

So, big case statements are pretty unavoidable.

Altera_Forum · ‎07-13-2012

For what you are doing a 'generate for' statement sounds appropriate. Generate statements are processed during the preprocessor stage. You could also create a two dimensional array as well, verilog won't let you pass a 2D signal through the hierarchy though.