VCCA_PLLn

[Altera_Forum]

I know the Stratix II device handbook says I must connect the VCCA_PLLn even if I'm not using PLLn. But do I really have to? What will happen if I don't? I want to save all the power I can.

[Altera_Forum]

Yes, you really have to. I think the reason behind it is that the part could get damaged if you leave the VCCA floating. If you're not using that particular PLL, it won't draw any current (except maybe leakage) anyway, so the power difference will be very minimal.

[Altera_Forum]

I recently spent a very long time debugging a problem that turned out to be an unconnected PLL power supply. The design used no PLLs and almost completely passed through qual testing (temp cycling and everything) when we found a problem with a completely unrelated I/O cell tristate control. An embarrassingly long time passed between discovering the problem and figuring out what was causing it. 

 NEVER NEVER NEVER leave a PLL power supply pin unconnected.

[Altera_Forum]

I expect that the side effects would be extra noise induced in the device, and it may draw more current than expected - due to portions of the unpowered analog PLL circuit feeding digital portions of the PLL circuit, causing the digital portion to unintentionally switch - creating the extra noise and current draw.

[Altera_Forum]

If I don't need a PLL I generally just connect the suppy unfiltered to VCCint. In other words I don't bother with any filtering since I won't need it. Do any of you think this is a problem?

[Altera_Forum]

I think the internal VCCAs are connected together for all PLLs inside the device, so if you couple noise onto the VCCA of a PLL you are not using (by not filtering its VCC), it could affect the PLLs you are actually using. Now whether this happens in practice is another story. It will depend on your specific system and frequencies & PDN involved I would think.

[Altera_Forum]

As long as you aren't using any PLLs then filtering isn't required. If you are using a subset of the PLLs then it is best practice to use filtering on the PLL VCCA pins.

[Altera_Forum]

I recently found out that VCCAs are all separate in the device, so you don’t need to decouple the ones you are not using, as JB said. However, you still must power unused PLLs’ VCCAs to the appropriate voltage level

[Altera_Forum]

Just a clarifying post here.... 

 Both VCCA and vccd for the PLLs must be connected to supply voltages. The problem I referred to earlier was from an unconnected VCCD for one of the PLLs.  Remember, this design that I was working on didn't even use PLLs. None. All we did was leave the VCCD from one of the PLLs unconnected and it turned into a two month debugging adventure. As I mentioned earlier, the problem manifested in an occasionally faulty tristate control in a completely unrelated I/O cell.  Just follow the pin connection guidelines, hook up PLL VCCA and VCCD pins and save yourself a debugging nightmare.

[Altera_Forum]

if the vcca filtering required for stratix III? i can't any reference to it.

[Altera_Forum]

Stratix® III Device Family Pin Connection Guidelines PCG-01004-1.2 

 http://www.altera.com/literature/dp/stx3/pcg-01004.pdf  Pin Name VCCA_PLL[L[1:4],R[1:4],T[1:2],B[1:2]]  Pin Description Analog power for PLLs[L[1:4],R[1:4],T[1:2],B[1:2]]. You must connect these pins to 2.5 V, even if the PLL is not used. Altera recommends that you keep these pins isolated from other VCC for better jitter performance.  Connection Guidelines Connect these pins to 2.5 V, even if the PLL is not used. Use an isolated linear supply. Power on the PLLs operating at the same frequency should be decoupled. Decoupling depends on the design decoupling requirements of the specific board. See Note 2.