What is the Maximum input voltage on a LVDS pin with 2.5 VCCIO?

[JFIGI]

using Cyclone V SoC 5CSEBA5U23I7N. We plan to use some inputs configured as LVDS with 2.5 VCCIO.

I am looking at Cyclone V Device Datasheet CV-51002 | 2019.01.25 and see in table 23:

 Absolute VMAX for a receiver pin = 1.2 V Max.

 But elsewhere I see in Table 23:

Maximum peak to peak differential input voltage VID after device configuration = 2.2 V. 

 Also in table 20:

VICM Max = 1.8 V

It seems to me that if I allow the VICM to be 1.8 then I will have exceeded the VMAX for a pin and if I have a VID of 2.2 V. I will have exceeded VMAX since VMIN is -0.4 V for a receiver pin.

Please tell me how I have misinterpreted this data sheet.

[SreekumarR_G_Intel]

Hello John, Thank you for the question , In the reference to the datasheeet CV-51002 \ 2019.01.25 For the VCCIO LVDS 2.5V Table 20 is the is specified the Differential standard specification for cyclone V devices. Table 23 actually mentioned about XCVR specification not the LVDS. Thank you , Regards, Sree