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Valued Contributor III
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clarification on Cyclone V transceiver reference-clock data sheet jitter specs

Regarding the Cyclone V data sheet (CV51002, 2016.06.10) Table 20 (page 25): 

 

https://www.altera.com/en_us/pdfs/literature/hb/cyclone-v/cv_51002.pdf 

 

Q1: Is the Transmitter REFCLK Phase Noise specification defined for one specific refclk frequency, or does it apply equally to all refclk frequencies (27 MHz to 550 MHz), without needing to be scaled by the refclk frequency? 

 

Q2: Regarding footnote 36 (below table 20 on page 25), what is the integration bandwidth to compute phase jitter? For example, is it 12 kHz to 20 MHz, or something else? Does it assume a brick wall filter, or 20 dB/dec rolloff?
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