- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi all,
I have been checking out this forum for a while, but this is my first post. I have a small problem with the Altera pci_mt32 module which I don't know how to resolve. Background: I am using a StratixII GX device and have instantiated the pci_mt32 component using the Quartus Mega Wizard tool. I am currently testing the pci_mt32 module using ModelSim. The pci_mt32 is connected on one side to my local design, while on the other to the testbench generated by the Quartus tool. Problem: Using ModelSim I can see that the device does not behave as it should. Namely, while doing a single memory write the pci_mt32 module doesn't assert the lt_ackn and lt_dxfrn signals. Furthermore when I do a burst write, the lt_ackn and lt_dxfrn signals are not asserted for the first data sample, but they are asserted for the rest of the burst. Obviously this is a problem as I can't write a single value via the pci_mt32, and also when doing a burst I can not write the first value in the burst. Has anyone encountered this problem before? Thanks in advance.Link Copied
2 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Hi all, I have been checking out this forum for a while, but this is my first post. I have a small problem with the Altera pci_mt32 module which I don't know how to resolve. Background: I am using a StratixII GX device and have instantiated the pci_mt32 component using the Quartus Mega Wizard tool. I am currently testing the pci_mt32 module using ModelSim. The pci_mt32 is connected on one side to my local design, while on the other to the testbench generated by the Quartus tool. Problem: Using ModelSim I can see that the device does not behave as it should. Namely, while doing a single memory write the pci_mt32 module doesn't assert the lt_ackn and lt_dxfrn signals. Furthermore when I do a burst write, the lt_ackn and lt_dxfrn signals are not asserted for the first data sample, but they are asserted for the rest of the burst. Obviously this is a problem as I can't write a single value via the pci_mt32, and also when doing a burst I can not write the first value in the burst. Has anyone encountered this problem before? Thanks in advance. --- Quote End --- Hi, I have exactly the same problem. Did you manage to find a solution? Regards, Grant
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Found the problem. The pci_mt32 core was being clocked by a PLL and not directly from the pci clock pin.
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page