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I saw the manual (IA-32 Intel Architecture Software Developer's manual Volume 3B) and I found that IA32_MISC_ENABLE[19](MSR register)was disable adjacent cache line prefetch.
But I wanna know not disable adjacent cache line prefetch but disabe stride prefetch.
In Architecture Optimization Reference manual, it describe hardware prefetching of data at page 6-4.
It occurs the strides prefetch by satisfying condition that eht strides of the cache misses is less than the trigger distance of the Hardware prefetch mechanism.
But I wanna that I don't use stride hardware prefetcher. so How Ican turn off stride hardware prefetchter?
please answer it.
Thanks in advance ^^
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In most of those models where there is a recognized advantage in disabling hardware prefetch, there is a BIOS setup option for that purpose. Also, with superuser privilege, the corresponding MSR setting (separate bits for 2nd sector and stride prefetch) can be changed. Changes in 2nd sector prefetch are more often useful than in stride prefetch setting.
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My test server is family ID 15 and model ID 6.
I can't find bios option. where is it?
please answer ^^
Thanks in advance ^^
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I don't believe there is a unique BIOS for a given CPU model. Disabling one or both hardware prefetch modes is most likely to be useful for applications like database running on 4 or more socket servers, so you expect to find this BIOS option on server models such as Harwich or Tulsa, but not on single socket models like Pentium D. The characteristic which favors this is that hardware prefetch would bring in many cache lines which aren't required by the application, while the cache lines which are required are either unpredictable, or fetched by explicit software prefetch inserted in the code.
Recent processor models are designed so as not to suffer from duplication between hardware and software prefetch, as when an application was built for another platform, with a compiler which performs automatic software prefetch, or when software prefetch is used to accelerate resolution of TLB miss.
Recent processor models are designed so as not to suffer from duplication between hardware and software prefetch, as when an application was built for another platform, with a compiler which performs automatic software prefetch, or when software prefetch is used to accelerate resolution of TLB miss.
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I find the messagein a year ago. Now I want to disable hardware prefetch to evaluate software prefetch effect on Pentium D processor. Just as the message saying,no bios support has been found. Any other way to achive it? Thanks in advance
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There are 2 bits in the MISC_ENABLE register.
Bit 19 - Adjacent Cache Line Prefetch Disable
Bit 9 - Hardware prefetcher disable - When set , disables the hardware prefetcher operation on streams of data. When clear(default), enables the prefetch queue.
The above info was extracted from Vol 3B, Appendix B (MSRs).
Have you tried setting bit 9?
I believe that this is true for both Pentium 4/Xeon and the core microarchitecture
Bit 19 - Adjacent Cache Line Prefetch Disable
Bit 9 - Hardware prefetcher disable - When set , disables the hardware prefetcher operation on streams of data. When clear(default), enables the prefetch queue.
The above info was extracted from Vol 3B, Appendix B (MSRs).
Have you tried setting bit 9?
I believe that this is true for both Pentium 4/Xeon and the core microarchitecture
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It seems it does not work on Atom processors. Do you know why?
--
Jordi
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