Software Archive
Read-only legacy content
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17060 Discussions

Ignoring Alpha OpenVMS arithmetic error

Deleted_U_Intel
Employee
417 Views
Is there any way on such a system to ignore certain arithmetic errors through environment settings rather than by compilation options?

I am getting a high performance arithmetic error for what it detects as a divide by zero. (I know, sloppy code). The same code on Windows or various Unix systems works -- it apparently returns a zero, which is OK.

The issue is that this was compiled on a customer system on the other side of the world and we do not have an Alpha system or essentially any OpenVMS knowledge.

Thanks for any help.
0 Kudos
1 Reply
Steven_L_Intel1
Employee
417 Views
I suspect that on the other systems, you get an IEEE NaN, not a zero. You can get that too on VMS, but need to compile with /FLOAT_TYPE=IEEE /IEEE_MODE=UNDERFLOW_TO_ZERO There is no environment setting that will do this for you, as it requires completely different generated code.

Steve
0 Kudos
Reply