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Is there any way of moving data from general purpose register to MIC vector register without going through memory?
By the way, xeon phi system software development guide says there is an VABSDIFPI instruction, but there seems to be no intrinsics posted in ICC compiler reference. So which is correct?
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xeon phi system software development guide it will help you
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Dear James C.,
Data can go from GPR to vector registers only via L1 cache (or memory) -- this seems to be true since SSE2.
I have forwarded your question regarding the intrinsic to the compiler team.
Thank you.
Evgueni.

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