VT-d programming

[Yogi_D_]

I am trying to expriment with DMA remapping using VT-d.  By reading the VT-d spec, I know how to setup the remapping tables.  However, I don't know how to locate the register that will receive the base address of the remapping table hierarchy.

Reading the spec for my processor, I see there is a Root-Entry Table Address Register ( RTADDR_REG) at offset 20–27h.  But what is the base of this "block" ( the spec says this is PEG/DMI VT-d Remapping Engine Register Address Map).

Can anyone help me find this in the documentation somehwhere?

 Thanks!

[Quoc-Thai_L_Intel]

See "chapter 10.4.6 - Root Table Address Register from the Intel(R) Virtualization Technology for Directed I/: Spec" for more details.  Here is the URL: http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/vt-directed-io-spec.html?wapkw=directed+i%2fo

-Thai

[Quoc-Thai_L_Intel]

A new blog was created to provide resources for sw developers: Resources for Software Developers: Intel® Virtualization Technology (Intel® VT)

-Thai