This forum has really been helpful.
I wanted to know about Baseboard management controller and IPMI specification.
1. Does anyone know any article or paper discussing about them in detail and how they are implemented on the datacenter?
2. Is BMC firmware publically available for use?
3. How is intel node manager different from BMC?
Intel has a free e-book “Energy Efficient Servers: Blueprints for Data Center Optimization” that includes an overview of the BMC and the IPMI interface. It does not go into a lot of detail, but I recommend it as excellent background material to help understand the system structure at a high level. Chapter 5 discusses BIOS and system management firmware, including discussion of the ACPI standard for communication between BIOS and OS (and more discussion of C-states and other power-saving states), the baseboard management controller (BMC), and the IPMI interface.
The book is described at:
and can be downloaded from
I have read that article in the past. I skimmed through it.
But one thing I fail to understand is Intel rolled out Management Engine (ME) in 2008 having features similar to BMC like out-of-band monitoring.
BMC is implemented based on IPMI specifications.
Is BMC an interface on top of ME ? If yes does that mean ME in a way uses IPMI specifications?
BMC and ME are kind of confusing me, It would be great if you could show some light there.
I don't know whether there is public documentation on the internal management engines. I have trouble keeping track of Intel's terminology, but it looks like Intel's older processors (dating back to 2008) had Intel-controlled microcontrollers, while the newer processors (e.g., Skylake) have both Intel-controlled management engines and a management engine whose code is developed by OEMs. This allows an OEM to replace advanced BIOS code (such as health checkers or frequency/power controls) with management engine code.
Before Skylake, when the OEM's management software wanted to do something, it require an interrupt to put the processor in System Management Mode (SMM). The processor would then load the SMM code and run the desired function(s). The use of this mechanism could be monitored by watching the SMI interrupt counter and by watching for "lost" cycles using the performance counters (if the "freeze counters in SMM mode" bit is set). In the new world, much of this functionality can be put in management engine code, which does not require interrupting the CPUs, so it is lighter-weight, but also completely invisible. It is difficult to tell what functionality the management engine contains, but it can certainly monitor sensors on the chip, and can probably modify settings in the Power Control Unit to control processor frequency, energy/performance bias, etc.
Thank You for your valuable comments. I still have some few questions.
Is there any document which explains about BMC in detail?
And is it possible for me to write my own BMC firmware or this interface is open to just OEM vendors?
Also the document you shared "Energy Efficient Servers" it says BMC offloads to Node Manager (which they say is management engine but I don't believe them, it might be running on top of ME but is not an actual ME).
Thank You for your time
Unfortunately I can't help here. Most of this infrastructure is based on standards that have been developed since I left the computer design industry, and I only have a vague, high-level understanding of all the bits and pieces. It is not at all clear how much of this information is supposed to be comprehensible to the public....