Software Tuning, Performance Optimization & Platform Monitoring
Discussion regarding monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform updating.
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Cache Set

Rafael_Silva
Beginner
‎06-25-2012 05:19 PM
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I'm using a E5-2690 processor, and I would like to know it there is a way to know, given an addr (from a pointer), what cache set (L1, L2 and L3) this address is mapped to. Is it just something like: addr % number_of_sets ? Does make sense do it with a pointer (virtual address)?
Thanks.
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Wander_Gomes
Beginner
‎06-25-2012 07:54 PM
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I have the some problem!
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