Software Tuning, Performance Optimization & Platform Monitoring
Discussion regarding monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform updating.
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
1790 Discussions

Core i5 2nd Generation (Sandy Bridge) - Disable only cache L2/L3

Ciro_V_
Beginner
‎09-23-2012 02:56 AM
912 Views

Hi, i'm an electronic engineer. I need to disable (or exclude) only L2 and L3 cache on Core i5-2410m (06_2AH). Software Developer’s Manual (11.5.3 Preventing Caching) explain how to disable L1, L2 and L3 cache by using CR0 and MTRR but i need to disable only L2 and L3 cache. It is possible? How to do it? Thanks

0 Kudos

Link Copied

0 Replies
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.