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I am working on Error Detection module and was attempting to test using the error injection implementation mentioned in Intel® Xeon® Processor C5500/C3500 Series Datasheet, Volume 2 in section 4.12.40. It asks to program the MC_CHANNEL_X_ADDR_MATCH, MC_CHANNEL_X_ECC_ERROR_MASK and MC_CHANNEL_X_ECC_ERROR_MASK registers but attempting to write to this has no effect. Realized there is a lock for this space which is indicated by status in MEMLOCK_STATUS register (device 0: function 0: offset 88h), which in my case is reporting 0x40401 as the set value. This means MEM_CFG_LOCKED is set and I am not able to even unlock using the MC_CFG_CONTROL register (device 0:function 0: offset 90h). I am writing 0x2 to this register but that does not help to unlock the ECC injection registers for writing. How can I achieve this? I am running FreeBSD on the bare metal and not as a virtual machine.
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Maybe lock is being set by the BIOS.
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Thanks for reaching out iliyapolak, I needed to clarify one more thing, is it that if MEMLOCK_STATUS shows the current state as 0x40401 which indicates MEM_CFG_LOCKED is set, (and bits 10 and 18 are not documented). So if MEM_CFG_LOCKED is shown set then even if we attempt writing 0x2 to MC_CFG_CONTROL it will not unlock the Memory Controller Control Registers for writes? Is this something only the BIOS can do? Which knobs to tweak to get the MEMLOCK_STATUS to show a 0 for bit 0?
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Tell the truth I do not know. I can only suspect that BIOS could be called from OS or from chipset driver to perform this operation. Another possibility is that unlocking of MC_CFG_CONTROL could be performed from SMM mode. I am using Win platform and sometimes I try with kernel debugger read pci/pcie configuration space and it is not unusual that debugger fails to read some registers.
Did you try to set bit 10 and bit 18 and write to MC_CFG_CONTROL? Maybe this is the reason for the unlocking failure.
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