Software Tuning, Performance Optimization & Platform Monitoring
Discussion around monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform monitoring

Enabling LBR fails quitely

Maor_H_
Beginner
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Hey,

My code enables LBR by setting 0x1 to DEBUG_CTL MSR (0x1d9), and works properly on 1 PC and 1 Server i've checked so far.

I'm executing the same code on XEON E5-2620, but when i read the MSR after setting, it's still 0, and the LBR stack is empty... is there anything special i need to do to set the LBR flag for this kind of processor? (don't know if it matters, but it is a multi processor server).

Thanks.

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