How to recognize wthat a applications exacting to latency ?

[SB17]

Hello all

I look for applications exacting to latency.  
Not always developers can tell that the application is exacting to latency.

I had an idea to define it by forum of monitoring of counters of the CPU.
Whether to check the CPU or process he expects data from memory or from a network.  

I looked on the Internet, but I thought that at this forum I can be directed in the right direction much quicker.

What counters can reflect a situation of waiting of process or the processor of data from memory or from a network?

Whether can reflect it that applications are exacting to latency?

Thanks for your time

P.S. Probably it somehow can be made by means of Intel Amplifer however I didn't try yet and it will be great do it by console or C.

[SB17]

Maybe my english is very bad.

I will try to rephrase

How to understand from PCM that the CPU/core is idle ?
Is it possible to understand that the idle is associated with waiting for a response from memory or PCI-E or file system ?

Tell me what I can read on this topic ?

Thanks for you time

[Thomas_G_4 · Accepted solution]

Hi,

Idling is a difficult term for recent CPUs. Is is pretty rare that a CPU core has no instructions in the pipeline (idle) but is not forced to some different low-power state.

There are many events that give you information about halted CPU cores.
The fixed events on Intel CPUs give a first impression: If the INST_RETIRED.ANY event value per second is small, this is an indication. If the CPU_CLOCKS_UNHALTED.* are small, the CPU was probably in halted state.

You should have a look at all events with STALL in their names. Moreover, the CYCLE_ACTIVITY.* events can be what you are searching for. There is an event like "no activity due to waiting on memory loads". But keep in mind that a stall is different from idling.

Additionally, take a look at the C3 and C6 state counters.

There are scientific papers about that topic but the points, you are interested in, are somewhat hidden. There is a paper for reducing the CPU clock when a code's performance is limited by memory accesses. So, they need to detect it but their main work is about the reaction. I don't have links to that paper, but <insert search engine> will find it.

[McCalpinJohn]

Unfortunately the documentation in Chapter 19 of Volume 3 of the Intel Architectures SW Developer's Manual is badly broken for the CYCLE_ACTIVITY.* events on almost all processors.   The documentation for the Skylake core looks like the only one that correctly lists the required CMASK values.

[SB17]

sorry for long absence

Vary thanks for answer.

I will try to find info about CYCLE_ACTIVITY.* events.

Thanks for you time