What is the dependency of different simd intrinsic

[knightyang]

I am currently building an infrastructure (in MATLAB) to allow people to automatically use the SIMD optimizations in Simulink model (or Matlab) on their target hardware.

However, I have encountered the following difficulty

For different INTEL SIMD instruction sets, e.g. AVX512, AVX2, AVX, SSE4.1, SSE2, SSE Are there any dependencies?

By dependency, I mean the following:

(1) For example, if a CPU supports AVX512, it will need to have AVX and SSE.

     Is this true? If so, is there a place where I can find such dependencies for all different intrinsic set

(2) If I want to enable optimization for AVX512, I will have to enable AVX and SSE

    Is this true? If so, is there a place where I can find such dependencies for all different intrinsic set

 I was not able to find the information in "INTEL Intrinsics Guide" https://software.intel.com/sites/landingpage/IntrinsicsGuide/

Is there a documentation about the dependencies of different SIMD intrinsic set?

If not, can someone from INTEL provide one?

[knightyang]

I am currently building an infrastructure (in MATLAB) to allow people to automatically use the SIMD optimizations in Simulink model (or Matlab) on their target hardware.

However, I have encountered the following difficulty

For different INTEL SIMD instruction sets, e.g. AVX512, AVX2, AVX, SSE4.1, SSE2, SSE Are there any dependencies?

By dependency, I mean the following:

(1) For example, if a CPU supports AVX512, it will need to have AVX and SSE.

     Is this true? If so, is there a place where I can find such dependencies for all different intrinsic set

(2) If I want to enable optimization for AVX512, I will have to enable AVX and SSE

    Is this true? If so, is there a place where I can find such dependencies for all different intrinsic set

 I was not able to find the information in "INTEL Intrinsics Guide" https://software.intel.com/sites/landingpage/IntrinsicsGuide/

Is there a documentation about the dependencies of different SIMD intrinsic set?

If not, can someone from INTEL provide one?

[Bernard]

Hi,

>>>For example, if a CPU supports AVX512, it will need to have AVX and SSE.

Is this true? If so, is there a place where I can find such dependencies for all different intrinsic set>>>

Yes, it is true. There is a backward compatibility and even the old 80-bit x87 floating-point ISA is supported by the newest CPU.

>>>(2) If I want to enable optimization for AVX512, I will have to enable AVX and SSE

Is this true? If so, is there a place where I can find such dependencies for all different intrinsic set>>>

Enable optimization for AVX512 exactly where? -- Compilation settings? Can you be more precise.

In the case of supported SIMD ISA the Intrinsic guide provides the CPUID flags. You can verify support of the specific CPU by using lscpu or cpuid Linux command, or programmatically by issuing CPUID machine code instruction: 

Support for different SIMD ISA (Intrinsic guide excerpt). Pay attention to CPUID flag per specific intrinsic.

[knightyang]

Hi Bernard,

Thanks for the reply.

I have two follow-up questions

For (1), Is the list here

https://software.intel.com/sites/landingpage/IntrinsicsGuide/#

Ordered according to dependency I was referring to? (e.g. FMA depends on AVX2)

Also, for different versions of AVX512 (or AMX), are they also have dependency or they are independent?

When two versions of AVX512 are used together, is there a priority which one of them will be used or different versions are mapped to completely different operation/functions during optimization?

For (2), I am referring to the compiler flags we need to add to enable them.

Assume I have avx2 and add compiler flag -mavx2 (or MSVC equivalent),

Will this enable simd optimization for its prerequisites, such as AVX, SSE4, SSE2, SSE?

Or do I need to add comopiler flags to all of them? 

[Bernard · Accepted solution]

Hi,

>>>For (1), Is the list here

https://software.intel.com/sites/landingpage/IntrinsicsGuide/#

Ordered according to dependency I was referring to? (e.g. FMA depends on AVX2)

Also, for different versions of AVX512 (or AMX), are they also have dependency or they are independent?>>>

The order of SIMD ISA (in Intrinsic Guide) is due to its following succession i.e MMX->SSE->SSE2->SSSE3->SSE4.1->SSE4.2->AVX->AVX2>AVX512.

FMA instructions were introduced in AVX2 technology (so yes it depends on AVX2 support).

I do not know how at machine level the AMX is implemented (probably it has its own register file and execution circuitry), so it is irrelevant to AVX512.

>>>When two versions of AVX512 are used together, is there a priority which one of them will be used or different versions are mapped to completely different operation/functions during optimization?>.>>

I presume, that you mean different subsets of AVX512.  Compiler can determine the exact architectural details of the target processor and may generate the appropriate code. See this. 

>>>Will this enable simd optimization for its prerequisites, such as AVX, SSE4, SSE2, SSE?>>>

Here is the exact answer 

core-avx2

Generates code for processors that support Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® AVX, SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.

https://software.intel.com/content/www/us/en/develop/documentation/cpp-compiler-developer-guide-and-reference/top/compiler-reference/compiler-options/compiler-option-details/code-generation-options/march.html

[Bernard]

Hi,

I have forgotten to add this link  where you can find the information about the various Intel CPU families and their SIMD technologies support.