Software Tuning, Performance Optimization & Platform Monitoring
Discussion around monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform monitoring

reading TLB

Salame__David1
Beginner
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Hi,

For a specific lab experiment involves specific HW issue and timing, I want to avoid page-walking if possible,
And so I wonder if there is a way (or an intel-specific way such as MSR of some sort), to query the TLB for a specific virtual address' physical address translation, and if that virtual address is not currently in the TLB, or has been invalidated, I'll do the actual page-walking...

This is for a lab experiment so the solution surely can be Intel-specific.

Any ideas?

Thanks in advance!

David

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