Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Pin assignment problem

Altera_Forum
Honored Contributor II
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i'm using quartus ii 9.1 with incremental compilation and i have thie error message "can't place multiple pins assigned to pin location w9 " but in pin editor allows to place that pin and one only pin is assigned to that location. what's happening is there a known bug?. 

 

 

Thanks
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Altera_Forum
Honored Contributor II
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Hi, 

 

can you tell which device you are using? I think you´re problem has to do something with the configuratiuon pins of your specific device.
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Altera_Forum
Honored Contributor II
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Did you expand the error message? It should have more details about conflicting assignments.

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Altera_Forum
Honored Contributor II
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Hi, 

no conflict with dedicated pins, the conflict is with another pin whose assignment is made from the fitter and not form me. I am using an EP2C35. 

Why the fitter assign some pin location?
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Altera_Forum
Honored Contributor II
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Hi, 

 

if the case is F484 you should get no problems. You are right. What kind is the second assignement. Can you give some detailed information?
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Altera_Forum
Honored Contributor II
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The only automatic assigned function for pin W9 of EP2C35F484 is differential pair with Y9. But as said, the full error message text should tell.

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Altera_Forum
Honored Contributor II
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Tx_Ena_Block_New:inst|clk_tx[5] Location PIN W9 QSF Assignment Tx_Ena_Block_New:inst|clk_tx[5] Location PIN G5 Post-Fit Property 

 

After a compilation with all design blocks with postfit preservation level I find this "fitter incremental compilation conflict" I have assignd the output to pin W9 but it seems it is assignd automatically to G5. I don't understand why. 

In the resource section repot I find many output pins i have assigned as virtual assigned to a phicical output by the fitter? Why?
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