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I`have downloaded and installed Altera`s University program IP`s which are made for DE1 and DE2 boards. I`am using the Cyclone II FPGA Starter board, which is same as DE1 board (as I saw), and I have made one simple design with SOPC builder which is suposed to use SRAM as Instruction/Stack/HEap memory and with NIOS II processor and PIO port connected to diodes.
The program I made didn`t manage to load in SRAM, but when I changed memory in SOPC builder from SRAM to On-Chip memmory, thus using 73 percent of Cyclone II M4k blocks, program was working perfectly. I presume the problem is in the constraints for SRAM which I didn`t use. If anyone can help me to get this SRAM working I would appreciate it very much!コピーされたリンク
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Hi Stanislav,
how do you connect to the SRAM? You probably need to use a tristate bridge. The SOPC Builder should also feature an SOPC component for your SRAM, which has to be connected to the tristate bridge. So you probably have to adapt the SRAM settings from the DE1 boards to your board. Probably it's best to have a look into the examples that are available for you starter kit, which you can download from the Altera webpage. Cheers, Alex- 新着としてマーク
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Well, the SRAM works now fine, the error was due to one or both of the following reason.
The core I used was described in class.ptf format, and when I converted it into . _hw.tcl format, made a new design and assigned pins (lot`s of them, really boring, the second probable reason of mistake), everything worked fine. Thanks Alex!- 新着としてマーク
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