Re: Modelsim & VHDL Configuration

Altera_Forum · ‎01-10-2008

It seems that Modelsim doesn't support VHDL Configuration feature.

One of my module contain two architectures, in the top level VHDL file use VHDL configuration to use the two different architectures.

During modelsum pre-simulation, it seems to always use the last architecture.

Anything mistake?

Thanks for any response.

Altera_Forum · ‎01-10-2008

Did you specify the configuration as your simulation target? If you specify the entity, it will simulate without the effect of the configuration.

Altera_Forum · ‎01-14-2008

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Did you specify the configuration as your simulation target? If you specify the entity, it will simulate without the effect of the configuration.

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Could you express more clearly & detaied, I can't understand what you mean. Sorry for my poor english. :)

Altera_Forum · ‎01-14-2008

Configurations aren't automatically applied to entities in Modelsim. If you are simulating a test bench, you need to instantiate the configuration rather than the entity. If you are instantiating a component, you can bind it to the configuration with a configuration specification in the architecture declarative region:


for inst: my_comp
    use configuration work.cfg;

If you are simulating your entity directly (and possibly driving your own stimulus onto the pins), you need to simulate the configuration instead, e.g.

vsim work.cfg

vs.

vsim work.entity

Altera_Forum · ‎01-14-2008

I am using Entity-Architecture Pair Configuration instead of Lower-Level Configuration, so that I can decribe two architectures for the same entity in a single VHDL file, and then use Entity-Architecture Pair Configuration to configurate the entity in the upper-level VHDL file.

Do you know with Entity-Architecture Pair Configuration, how to make modelsim understand the configuration?

configuration con of FREQMeasure_SingleChannel is
	for rtl 
		for U1: FREQMeasure_PeriodCounterDuringStrobe USE ENTITY WORK.FREQMeasure_PeriodCounterDuringStrobe(WithStrobeOutput);
		end for;
		for U2: FREQMeasure_PeriodCounterDuringStrobe USE ENTITY WORK.FREQMeasure_PeriodCounterDuringStrobe(WithoutStrobeOutput);
		end for;	
	end for;
end con;

Thanks for your patience...

Altera_Forum · ‎01-15-2008

It depends on what you are simulating. Do you have a test bench that instantiates the entity? If so, then you need to change it to instantiate the configuration, e.g.

dut: configuration work.con generic map (...) port map (...);

If you're testbench instantiates a component, you can bind it to the configuration using the configuration specification I gave in my previous post.

If you are simulating the entity directly, my previous post explained that you need to simulate the configuration.

Altera_Forum · ‎01-16-2008

I instantiate lots of components using generate clause, pls see below:

   U2: FOR i IN 0 TO (GEN_TOTAL_CHANNEL - 1) GENERATE
          channel_x: FREQMeasure_SingleChannel GENERIC MAP(GEN_BENCHMARK_FREQUENCE, GEN_MAX_TARGET_FREQUENCE, GEN_MIN_TARGET_FREQUENCE, GEN_T_STROBE_WIDTH)
		     PORT MAP (csi_freqmeasure_benchmark_clock_export, cos_freqmeasure_channel_in_export(i), s_strobe, csi_freqmeasure_clock_reset_n, s_A_TargetCounter(i), s_A_BenchCounter(i));
       END GENERATE;

I hope to use the same FREQMeasure_SingleChannel configuration(showed in pre-post).

In this case, how to specificate configuration in the architecture declarative region?

Thanks!

Altera_Forum · ‎01-16-2008

I have tried:

for channel_x: FREQMeasure_SingleChannel 
use configuration work.con;

But modelsim report error that:

No statement with label "channel_x" was found.

I also try:

for U2: FREQMeasure_SingleChannel 
use configuration work.con;

Failed again!

Altera_Forum · ‎01-16-2008

You need to put the configuration specification in the declarative region for the generate block, e.g.


U2: FOR i IN 0 TO (GEN_TOTAL_CHANNEL - 1) GENERATE
    FOR channel_x : FREQMeasure_SingleChannel
           use configuration work.con;
    BEGIN
         -- Your instance here  
    end generate;

Altera_Forum · ‎01-16-2008

It works...

Thanks a lot!

Altera_Forum · ‎01-16-2008

Another problem occurs :(

use configuration work.con can make modelsim select the correct configuration, but when I return back to SOPC Builder and try to re-generate system, the following error reported:

Error: freqmeasure_wholesystem_inst: Error (10481): VHDL Use Clause error at FREQMeasure_WholeSystem.vhd(149): design library "work" does not contain primary unit "con" File: E:/Altera_Project/My_IP/FreqMeasure/FREQMeasure_WholeSystem.vhd Line: 149

Altera_Forum · ‎01-16-2008

You defined this as a custom component? Did you add the configuration file to the list of HDL files for the custom component? If not, you'll need to add the file containing the configuration to your Quartus II project.

I'm no SOPC Builder expert so take anything I say with a grain of salt. :)

Altera_Forum · ‎01-16-2008

The configuration declaration is in the same file of the HDL file which contain one entity and two architectures associated with the entity. It has been added to the list of HDL files for the custom component.

I can compile the whole quartusII project without error, so it maybe a bug of SOPC Builder.