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hello ,recentely I meet a question is use EPM3128 to device 5v Cmos,and i use a pull up resistor with 5V.and in assignment editor---> use auto open drain ,but some one said maybe it is not useful for me to use open drain,i must use this code:
Library ieee; use ieee.std_logic_1164.all; entity OPNDRN is port( a_in : in std_logic; a_out : out std_logic); end OPNDRN; architecture BEHAVIOR of OPNDRN is begin process (a_in) begin if (a_in = '0') then a_out <= '0'; elsif (a_in = '1') then a_out <= 'Z'; else a_out <= 'X'; end if; end process; end BEHAVIOR; I want to know how to use this ,thank uLink Copied
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Your code is equivalent to the open-drain primitive. When you compile your design, the fitter report will tell you if the output is implemented as an open-drain output or not.
If you use schematics, you should insert the OPNDRN primitive in your design (before the signal goes to an output pin), instead of setting it in the Assignment Editor.- Mark as New
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thanks you very much .
I see it in the fitter report
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