Strange behavior of SPOC

[Altera_Forum]

Hi,  

I'm creating a Custom Peripheral for my Nios2 system. When I edit the component in SOPC, the Wizard (that lets us modify/add interface signals ... etc to the component) dramatically slow down the whole system. When I open the task manager, there are like 10 intances of "quartus_map" running ?!?!?!? ...  What's wrong with my system? Any one got the same problem? Regards,  Jeff

[Altera_Forum]

Hey that is interesting. I've not seen that one. Is your component based on HDL code that you've written? 

 Jake

[Altera_Forum]

Hi, based on HDL code. I've written the code and import it using the "create component" wizard. Should you need the HDL file to try, let me know ... thanks million times. I cry out loud whenever i need to re-edit my custom peripheral. 

Jeff

[Altera_Forum]

Yes if you could post your code, we could give it a shot.

[Altera_Forum]

I used to see this using older versions of SOPC Builder (7.1-7.2). I use 9.0 these days so I haven't seen this issue in a while. Mapper is being called to elaborate the signals and parameters. Make sure that you don't have any parameters that are based on other parameters that affect the top level module signal widths and this breaks mapping rules. 

 Once you have a component .tcl file saved you can manually edit it and set the parameters which don't affect elaboration to 'affects_elaboration false' which should speed things up. To learn more about the underlining .tcl commands you can refer to the Quartus II handbook, volume 4 (SOPC Builder), chapter 7.

[Altera_Forum]

Hi,  

Thanks for the suggestion, i'm trying out. I'm using v8.0sp1. I attached VHDL file and the screenshot of my system ...  Jeff

[Altera_Forum]

FYI ... Avoid the problem by not having Parameters (having parameters that affect only internal signals' widths does cause system slow down) ...  

regards,  jeff

[Altera_Forum]

No replies, explanation? :-s

[Altera_Forum]

Sorry, I got distracted. Can you give me your _hw.tcl file as well? 

 Jake

[Altera_Forum]

Well I've created a component out of it and at present my system doesn't seem to be having any trouble with it. You're welcome to try it.  

 A few things though. You've got a few signals that don't appear to go anywhere (tx_clk and clk). Also, is there a reason why you made the cpu interface so complex? Are you really doing bursts on the avalon slave? All you really need is write, read, waitrequest, writedata, readdata, and address. Everything else is useless unless you are connecting it to a master that knows what to do with it (NIOS does not).  Jake

[Altera_Forum]

Hi Jake,  

What version are you using? I used 8.0sp1. If that's the case then probably something wrong with v8.0. For those unused signals, because i plan to use them in future. Thinking of DMA/etc .. not yet fully grasped the Spec of Avalon but I just let them be there first.  Thanks a bunch...