SOPCS FIFO vs External FIFO

[Altera_Forum]

I am looking into a new design that will require quite a few FIFO memories. I am trying ot decide whether to use the standard SOPC FIFO or a FIFO external to the SOPC system (internal FBGA memory). We have working designs that have implemented FIFO's with their own custom logic that I could copy and adjust. The questions are as follows :- 

1. If I used the internal SOPC FIFO how would I go about trasnferring data to and from outside the SOPC system ? 2. If I used a FIFO external to the SOPC system, how would I interface data to and from this FIFO into the SOPC system ?  3. Are there any other issues that I should consider ?  Thank you in advanced  Shmuel

[Altera_Forum]

Hi, 

 I hear about the use of "Avalon to External Bus Bridge" and "External to Avalon Bus Bridge" IP Blocks (from university program) for interfacing a peripheral with the Avalon BUS (i.e. the NIOS II, so the SOPC module...). But I don't know how to use it with a FIFO... I think with a SOPC FIFO it will be more easy... I have a similar problem to solve... Look here in my post (http://forum.niosforum.com/forum/index.php?showtopic=6831) about transfering data from a DCFIFO to an SRAM memory block.