dev/uart_rs232

[Altera_Forum]

Hello! 

 I try to send data to the rs232 of the Nios Embedded Evaluation kit.  I used the SOPC Builder and used the SOPC files of the Nios II System Architect Design Tutorial. There I put in the uart-rs232.(9600 Baud one stop Bit) In the top level Design I put an input on the rxd_to_the_uart_rs232 (default value VCC) and an output on the txd_from_the_uart_rs232. In Pin Setup I did this settings:  Node Name: Direction: Location: I/O Bank: VREF Group: I/OStandard: rxd_to_the_uart_rs232 input IOBANK_8 8 - 2.5 V(default) txd_from_the_uart_rs232 output IOBANK_8 8 - 2.5 V(default)    In Nios II IDE I compiled everything. The rs232 name: UART_RS232_NAME "/dev/uart_rs232"   The program to send data is this:  FILE *fp;   fp = fopen("/dev/uart_rs232", "w+"); // also used wb+, w+  if(fp){  printf("open succesful\n");  fwrite('a', sizeof('a'), 1, fp); // also used fwrite('a', strlen('a'), 1, fp);  fclose(fp);  }  else{  printf("Error writing rs232");  fclose(fp);  }   The file opens but I get no data out of the txd pin and I am sure I am using the right pin. What am I doing wrong? Please help!!

[Altera_Forum]

In C 'a' is a character, while "a" is a string. fopen is expecting a pointer to a buffer, so you should use strings. Try with write("a", strlen("a"), 1, fp); 

If it still doesn't work, I'd suggest to put a signaltap probe on your tx and rx signals. That way you would know if the problem comes from inside the FPGA or outside.

[Altera_Forum]

Thanks for the reply! 

I tried this but nothing happened...  I am sure it`s in the fpga.. Here are my setups.

[Altera_Forum]

I have to make 5 post do put in Links.. so

[Altera_Forum]

another and the my pictures will fallow...

[Altera_Forum]

Here are my setups. 

 http://www.bilder-space.de/bilder/9bae73-1286202557.png http://www.bilder-space.de/bilder/7911b2-1286202660.png http://www.bilder-space.de/bilder/936a96-1286202687.png http://www.bilder-space.de/bilder/591784-1286202725.png

[Altera_Forum]

Ok I think there is a fault in the Pin connection. I don't know how to connect the RxD and the TxD. The documentation shows the HSMC Bank 1 J4 and K4. But there are no pins like these..

[Altera_Forum]

Hi,  

You must connect the uart pins to HSMC Bank pins.   I solved this problem like this: * Adding in pin planner: o HC_UART_TXD PIN_H17 o HC_UART_RXD PIN_E18 * and, because these pins are used for configuring the fpga, you must change the device settings: o ActiveParallel and remote (I don't know if this is necessary, but I did like this) o Dual-port pins: all as Standard IO except clk     Uart pins must be connected to H17 and E18 that are the pins of the HSCM bank.   I hope this works for you.

[Altera_Forum]

Thanks for reply Ealonso!  

 I solved the problem last night at 11 pm. i did the same like you said. The problem was that the pins have different names from one side to the other. The HSMC_TX_p11 (pin 119 and named uart_txd on lcd daughtercard) is the pin that goes to H17 of Bank 6. The HSMC_TX_n10 (pin 115 and named uart_rxd on lcd daughtercard) is the pin that goes to E18 of Bank 6. Why so uncomfartable?  Who needs the finished sopc file and the fpga can weite me.

[Altera_Forum]

Other question. Where do I change ActiveParallel and remote and Dual-port pins: all as Standard IO except clk?

[Altera_Forum]

After puting the Pins txd and rxd to e18 and h17, 

I did Assignments-> Device-> Device and Pin Options-> Dual Purpose Pins-> all use as regular IO except DCLK and ->Configuration scheme -> Active Parallel and -> configuration mode-> Remote. After compilation theere are always errors.  Error: Configuration mode specified as Remote but remote update block is not found in design Info: Fitter preparation operations ending: elapsed time is 00:00:00 Warning: Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information. Error: Can't fit design in device Error: Quartus II Fitter was unsuccessful. 2 errors, 2 warnings  Error: Peak virtual memory: 250 megabytes  Error: Processing ended: Tue Oct 05 12:37:17 2010  Error: Elapsed time: 00:00:10  Error: Total CPU time (on all processors): 00:00:10 Error: Quartus II Full Compilation was unsuccessful. 4 errors, 276 warnings

[Altera_Forum]

Sorry, I didn`t read your mail till now. 

 I forgot to tell you that if you configure "active parallel" and "remote" you must include a 'Remote update 'module on your nios (SOPC Builder).(Peripherals->FPGA peripherals, connected via Avalon to the cpu). It works ok downloading .sof file via jtag. I don't know if other configuration modes work ok.   As I said I don`t know of this is necesary but i configured this way. Perhaps only configuring dual-ports is enough.   I think the examples given with the NEEK have this remote configuration.

[Altera_Forum]

Hello Ealonso! 

I have made all. Compilation was succesfull! But in Nios there are still no signals out of the rs232. If I put the stdout to the uart_rs232, I can`t run the program because it says : can't open uart : No such file or directory.  It's so hopeless, everytime I get a bit forward nothing still happens!  Do you have a running system that you can send me per mail, so that I can look where my faults are?

[Altera_Forum]

I think that if you use a component as stdout, it isn't available for access through fopen() anymore. 

If you put stdout to the UART, then you can directly call printf() without opening any file, and the output should go to the UART.

[Altera_Forum]

Also tried this.. 

 Nothing, I think I am on the right way, but somewhere is a bug and I don't find it! I think it is still in my hardware. Has nobody a working SOPC and FPGA Project that I can implement with my Nios Software?

[Altera_Forum]

I got it ;-) 

 All setups you told me were right and necessary Ealonso. The fault was that I wanted to take signals from the TXD. ;-D Thanks a lot for help!!