Verify the EPCS code using Quartus

Altera_Forum · ‎07-24-2008

Hello,

I'm trying to verify a JIC file that I programmed using Quartus and I'm getting an Error " Can't verify device". The FPGA is STII family. Do you have any idea how can I verify the code I programmed? (I'm trying to compare with another JIC file).

Thanks for your help

Avishai

P.S I attached a "print screen" from the Quartus SW. I erased the CS.

Altera_Forum · ‎07-24-2008

It seems the jic file is not generated properly from sof file, it should show 'Factory default SFL image' in file column of first row and your device name in device column and in second row there should be path of your jic file and EPCS name in device column

Altera_Forum · ‎07-24-2008

Hello,

maybe I wan't clear and I'm sorry. Please let me phrase my question again.

I'm not trying to program the EPCS. I do managed to program it but I can't do verify afterwards or comapre the EPCS contant to a JIC file. The attached file was from Quartus 5.1. On Quartus 7.2 I can see both raws that you mantioned.

Do you have any other suggestion why I can't do verify?

Thanks for your fast response.

Avishai

Altera_Forum · ‎07-24-2008

Looks like you are trying to program the Stratix II and verify the EPCS in the same operation.

I guess this should be OK but it might be prudent to try the verify of the EPCS by itself.

Altera_Forum · ‎07-24-2008

Hello,

I tried this also marking only the verify check box and it didn't work.

If you have other ideas I'll be happy to hear about it.

Thanks

Avishai