Demand DataL2 Miss Rate =>
(sum of all types of L2 demand data misses) / (sum of L2 demanded data requests) =>
(MEM_LOAD_UOPS_RETIRED.LLC_HIT_PS + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT_PS + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM_PS + MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS_PS) / (L2_RQSTS.ALL_DEMAND_DATA_RD)
I run a test on my program and here is the result:
if use thisformula to caculte the l2 cache miss rate, it's quite low
but why l2 cache hit event count + the l2 cache miss event count is much less
than all l2 data demand, shouldn't they be equal?
I believe the difference is that the L2_RQSTS events
include L1 prefetching. Prefetches from
the L1 hardware prefetch algorithms appear like demand requests to the L2_RQSTS
events. The MEM_LOAD events filter out both prefetches from L1 and prefetches from L2. SoMEM_LOAD events are
truly counting only demand loads issued from software.