I am following up on this post to see if anyone could help. On running VTune on a 3.4Ghz system, I notice the following on one particular module.
Clocktick Events: 10,529,800,000
Bus Data Ready from the processor events: 168,200,000
Here's my analysis on this. The total time this module spends on "bus" (i.e getting data from memory onto cache) is 168,200,000/800Mhz (FSB is 800 MHz and the Bus data ready event is in bus clocks). Itturns out to be .21s. The total run was about ~4sec. Can I conclude that FSB is not being saturated because of this ? Are there any better ways to know how much of FSB is being used ?