I do not know if this is the right forum to post this query, but here goes.....
My question is regarding the Performance Monitoring Events for Non-Retirement Counting under a Pentium 4 processor.
I am in the process of designing an Event Monitoring tool and for this i am referring to the following document: IA-32 Intel Architecture, Software Developers Manual, Volume 3 : System Programming Guide.
For theevents (in Appendix A1)"page_walk_type" and"BSQ_cache_reference"i have seen that the manual refers tosome non existent ESCRs.
page_walk_type : PMH_CR_ESCR0, PMH_CR_ESCR1
BSQ_cache_reference : BSU_CR_ESCR0, BSU_CR_ESCR1
The above mentioned ESCR registers do not seem be mentioned in the manual, or am i making some mistake ??