Hi,
Can someone please point me to the documentation for creating custom BSP for Stratix 10 devices (DE-10 pro) to support OpenCL interface?
Thanks,
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The documents you are looking for are here:
However, note that creating an OpenCL BSP is not a simple task even for experienced low-level FPGA programmers. The Terasic DE-10 pro board already has an official OpenCL BSP, albeit with support for only basic components (e.g. just one DDR memory bank). If you are facing issues with the existing BSP, it is best to contact Terasic's support directly and try to resolve the problem that way, rather than creating a whole new BSP yourself.
The documents you are looking for are here:
However, note that creating an OpenCL BSP is not a simple task even for experienced low-level FPGA programmers. The Terasic DE-10 pro board already has an official OpenCL BSP, albeit with support for only basic components (e.g. just one DDR memory bank). If you are facing issues with the existing BSP, it is best to contact Terasic's support directly and try to resolve the problem that way, rather than creating a whole new BSP yourself.
For more complete information about compiler optimizations, see our Optimization Notice.