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GDUFO2
Beginner
334 Views

Error (19877): Partial reconfiguration no longer supports synthesis revisions when trying to synthesize example design

Hi,

On my Intel DevCloud FPGA server, I trying to synthesize the following example:

/opt/a10/intelrtestack/a10_gx_pac_ias_1_2_pv/hw/samples/hello_afu

following the instructions provided in the README file.

 

I get the following error:

 

Error (19877): Partial reconfiguration no longer supports synthesis revisions

Error: Flow failed: 

Error: Quartus Prime Synthesis was unsuccessful. 2 errors, 9 warnings

 

How can I fix that?

Regards

 

 

 

0 Kudos
4 Replies
GDUFO2
Beginner
108 Views

Side Note: The server is configured with following Quartus version:

Info: *******************************************************************

Info: Running Quartus Prime Shell

Info: Version 18.1.0 Build 222 09/21/2018 SJ Pro Edition

 

108 Views

Sharing your design and the readme file may help to further understand.

 

You could refer to below KDB and check whether the workaround works for your case.

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/embedd...

GDUFO2
Beginner
108 Views

Hi Richard,

I've already took a look at your link, it does not give any guidance on how to update the example design from Intel.

You can download the example design from this LINK

Best

GDUFO2
Beginner
108 Views

Hi Richard,

Any news on that topic?

Best

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