Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
Announcements
All support for Intel NUC 7 - 13 systems has transitioned to ASUS. Read latest update.
474 Discussions

Looking for schematic/layout of the MAX10 FPGA Evaluation Kit

Broddo
New Contributor I
654 Views

Can anyone provide me with the schematic or layout of the MAX10 FPGA Evaluation Kit. It is using a MAX10 package (10M08 EQFP) that is similar to the one I'm using (10M50 EQFP). I'm currently designing a board around this part but I'm no layout engineer. It would be great to use the Eval Kits design docs as reference.

 

Thanks!

0 Kudos
3 Replies
AR_A_Intel
Employee
590 Views

Hello

 

Welcome to INTEL forum.

You could refer the schematics diagram at the download document on Table 2. MAX 10 - 10M08 https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-max-10-evaluation.html > ( Complete kit document installation )

Broddo
New Contributor I
590 Views

Ah excellent, thank you. I was searching for it in the wrong place. I thought the executable on that page was purely there to add example code to Quartus. I never thought to check it for documentation.

0 Kudos
AR_A_Intel
Employee
590 Views

You are welcome. Thanks for your update

0 Kudos
Reply