Can anyone provide me with the schematic or layout of the MAX10 FPGA Evaluation Kit. It is using a MAX10 package (10M08 EQFP) that is similar to the one I'm using (10M50 EQFP). I'm currently designing a board around this part but I'm no layout engineer. It would be great to use the Eval Kits design docs as reference.
Welcome to INTEL forum.
You could refer the schematics diagram at the download document on Table 2. MAX 10 - 10M08 https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-max-10-evaluation.html > ( Complete kit document installation )