Application Acceleration With FPGAs
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Msgdma extended descriptor ignoring the lsb [32-63] address

madhan_m
Beginner
1,197 Views

HI,

  I am using Msgdma memory mapped to Stream (in AGILEX -f agfb014r24b2e2v )(MM2S) with extended descriptor when i write the Descriptor and trigger the Dma data is streaming from the address of MSB  (0x0 offset ) 

for example :

I am write some dummy data in address 0x1160000000 
in 0x0 offset writing 0x60000000 

in 0x14 offset writing 0x11

and triggering the dma but when i check in sys tap analyser data is streaming which is present in 

0x60000000 only and ignoring msb 


 

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10 Replies
hareesh
Employee
1,154 Views

Hi,


can you share your platform design?


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madhan_m
Beginner
1,142 Views

thank you for our reply

 I am attaching the project file used 21.3 version

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hareesh
Employee
1,081 Views

Hi,

in project i seen 4 .qsys files. in that files which one are you using?

 

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madhan_m
Beginner
1,074 Views

hi,

i am using qsys_top.qsys 

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hareesh
Employee
1,046 Views

Hi,

if you see here you didn't used SSBIN line. connect that line

 

Screenshot 2022-10-31 163923.png

 

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madhan_m
Beginner
1,033 Views

hi,

i am not using that ip. you can delete it

i checked connecting it but it is  not working 

 

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hareesh
Employee
1,014 Views

Hi,

Can you please enable bellow shown option?

Screenshot 2022-11-04 063705.png

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madhan_m
Beginner
991 Views

hi,

  i tried with that setting but it is not working 

 

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hareesh
Employee
962 Views

Hi,

https://community.intel.com/t5/FPGA-Wiki/MSGDMA-design-example/ta-p/735335?wapkw=msgdma

 

please try this example project of MSGDMA.

 

 in attached folder you can find out all drivers(software folder) and platform design.

 

Thank you,

 

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hareesh
Employee
922 Views

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