I am trying to configure an Ethernet PHY using MDIO .
The MDIO lines of the Ethernet PHY is be connected to the intel MDIO IP in FPGA similar to the connection available in cyclone V GT evaluation board.
in my design the intel MDIO IP is connected to a NIOSII soft processor and external PHY.
Is it possible to get some reference/Example software(C/C++-codes) available for the NIOSII soft processor to make it work in the above scenario ?
Probably you can refer to the user guide below, table 50 for the register map of MDIO.
Besides, you can use the IORD or IOWR IO macro to configure those register. Please refer to the handbook below:
Thanks for the support.
I am a bit confused with the registers address especially offset registers address;0x20 and 0x21.
should I need to use the offset Register address or the byte address?