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423 Discussions

Remote debug AFU on-chip memory using System Console.

khyam
Novice
619 Views

Hi,

 

I have designed AFU with on-chip memory. I am doing remote debug of AFU using mmlink, system console, and signal tap.  I want to read and write the on-chip memory using the system console(remote method, that is TCP, the SLD hub controller).  I am using the following command to communicate on-chip memory using the system console.

1)

cmd: get_service_paths device 

rsp: /devices/1

 

2)

 cmd: set m_path [lindex [get_service_paths master] 0 ]


rsp: /devices/1/(link)/TCP/sld_hub_controller_system_0_fabric.h2t_0/sld_hub/(110:132 v1 #0)/phy_0/master

 

3)

cmd: set c_path [claim_service master $m_path ""]


rsp: error: claim_service: Could not claim service at /devices/1/(link)/TCP/sld_hub_controller_system_0_fabric.h2t_0/sld_hub/(110:132 v1 #0)/phy_0/master: Channel(s) have already been claimed, and the new claims are not compatible with the existing claims(s).
    while executing
"claim_service master $m_path """
    invoked from within
"set c_path [claim_service master $m_path ""]"

 

I got the above error when using the claim_service command to claims the service for exclusive use.

Even for the open_service command also I am getting the same error.

 

Could you please provide the solution to the above issue?

 

 

 

 

 

 

 

0 Kudos
5 Replies
RichardTanSY_Intel
562 Views

Hi @khyam 

 

I am not familiar with AFU and I believe the document guide here helps to provides some guidelines on how to remote debug AFU.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/afu-developers-guide.pdf

  • System Console must be started after launching the mmlink application. If System Console returns an error, close the mmlink application, re-invoke mmlink, and launch System Console again.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

 

khyam
Novice
559 Views

Hello @RichardTanSY_Intel ,

 

I am able to launch and connect AFU through remote debug and I have done debugging of AFU using signal tap tool. Instead of signal tap, we can use the system console for FPGA memory debug using Avalon MM commands like master_write_32 and master_read_32.  I tried using the system console tool for FPGA memory debugging,  the claim command used for claiming the master service for operation(FPGA memory read/write).  I got the below error for claiming master service.

error: claim_service: Could not claim service at /devices/1/(link)/TCP/sld_hub_controller_system_0_fabric.h2t_0/sld_hub/(110:132 v1 #0)/phy_0/master: Channel(s) have already been claimed, and the new claims are not compatible with the existing claims(s).

 

 

RichardTanSY_Intel
544 Views

Hi @khyam 

 

I am not sure what goes wrong... could you help to share your design (a simplified one .qar design file will do) that could duplicate this issue? 

May I know what OS and which device that you are using? 

Kindly help to provide the steps to duplicate the issue as well.

I will need to further investigate on this. 

 

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

RichardTanSY_Intel
517 Views

Hi @khyam 

 

Could you help to share your design (a simplified one .qar design file will do) that could duplicate this issue? 

May I know what OS and which device that you are using? 

Kindly help to provide the steps to duplicate the issue as well.

I will need to further investigate on this. 

 

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

RichardTanSY_Intel
487 Views

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

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