Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
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Requesting detailed information about Stratix 10 NX's Tensor Blocks

Tianchu
Beginner
384 Views

We have been using Stratix 10 NX(1SN21BHU2F53E2VG) to develop AI accelerator for a while, but always failed to find some detailed information about the special AI Tensor Blocks including the fmax under different speed grades, the public user guide of this IP and (maybe) the example design. Where can I find these support docs for the AI Tensor Block?

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JohnT_Intel
Employee
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HI,


You may get the information from https://www.intel.com/content/www/us/en/secure/design/internal/content-details.html?DocID=619366. If you do not have access, please contact your local sales.


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JohnT_Intel
Employee
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HI,


You may get the information from https://www.intel.com/content/www/us/en/secure/design/internal/content-details.html?DocID=619366. If you do not have access, please contact your local sales.


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JohnT_Intel
Employee
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Hi,


May I know if you have any other queries?


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Tianchu
Beginner
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Tianchu
Beginner
46 Views

Hello,

 

The provided link pointed to a website saying "developer account required", neither our the local sales nor the dev board vendor knows what to do with it. May I know the document id and the document name of what I'm looking for? Thanks

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