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Runtime configuration parameters in FPGA


Hi! I'm doing my master thesis on "Offloading parts of a motion controller to FPGA". This motion controller is currently running on a octa-core processor. I want to offload the compute intensive parts to an FPGA. The problem is that the control network has some configuration parameters which can changed during run time and make some parts go active/inactive other wise called "control-mode-switch". If I port these tasks to FPGA, how can I support this runtime configuration changes?


Also, the current motion controller running on multi-core CPU is programmed in C.


How can I port the source code to FPGA with minimal software architecture changes?


Please advice me!


Thanks a lot in advance!



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HI Nivetha,


Are you writing your design in OpenCL? If yes then it should be easily migrate using OpenCL as you can move your kernel to FPGA directly and have it control using processor. Please refer to