Schematic design about VREFB[2][BN0,CN0,EN0,FN0] and VREFB[3][AN0,BN0,CN0,DN0]

[Wangjun8]

芯片型号AGIB027R29A1E2VC，Bank 2B/2C/2E/2F/3A/3B/3C/3D外接4组72bit的DDR4，对应的I/O bank参考电源能否通过电阻对1.2V分压来实现？还是说必须通过电源芯片（如TPS51200）输出提供0.6V的参考电压？

[Fakhrul]

Hi,

You may refer to the Agilex™ 7 Power Distribution Network Design Guidelines for more clarification on this.

Regards,

Fakhrul

[Fakhrul]

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