Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
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Upgrading from A10's dcp platform to pim

liny
Novice
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嗨,大家好

       

The operating platform is intel arra10, and there is an error in the process of upgrading fim to pim.

Obtain the upgrade information from https://github.com/OPAE/ofs-platform-afu-bbb/tree/master/plat_if_release/templates/ofs_plat_if_compat/a10_gx_pac_ias, and successfully generate a new platform in hw after running install.sh document.

liny_0-1665566369981.png

 

But when I start compiling PR there is a compatibility error, the error is as follows:

Critical Warning (13432): Verilog HDL Compiler Directive warning at local_mem_cfg_pkg.sv(39): text macro "OFS_PLAT_PARAM_LOCAL_MEM_ADDR_WIDTH" is undefined File: /inteldevstack/a10_gx_pac_ias_1_2_pv/sw/opae-1.1.2-1/platforms/platform_if/rtl/device_cfg/local_mem_cfg_pkg.sv Line: 39
Error (13411): Verilog HDL syntax error at local_mem_cfg_pkg.sv(39) near text ; File: /inteldevstack/a10_gx_pac_ias_1_2_pv/sw/opae-1.1.2-1/platforms/platform_if/rtl/device_cfg/local_mem_cfg_pkg.sv Line: 39
Critical Warning (13432): Verilog HDL Compiler Directive warning at local_mem_cfg_pkg.sv(40): text macro "OFS_PLAT_PARAM_LOCAL_MEM_DATA_WIDTH" is undefined File: /inteldevstack/a10_gx_pac_ias_1_2_pv/sw/opae-1.1.2-1/platforms/platform_if/rtl/device_cfg/local_mem_cfg_pkg.sv Line: 40
Error (13411): Verilog HDL syntax error at local_mem_cfg_pkg.sv(40) near text ; File: /inteldevstack/a10_gx_pac_ias_1_2_pv/sw/opae-1.1.2-1/platforms/platform_if/rtl/device_cfg/local_mem_cfg_pkg.sv Line: 40
Critical Warning (13432): Verilog HDL Compiler Directive warning at local_mem_cfg_pkg.sv(42): text macro "OFS_PLAT_PARAM_LOCAL_MEM_BURST_CNT_WIDTH" is undefined File: /inteldevstack/a10_gx_pac_ias_1_2_pv/sw/opae-1.1.2-1/platforms/platform_if/rtl/device_cfg/local_mem_cfg_pkg.sv Line: 42
Error (13411): Verilog HDL syntax error at local_mem_cfg_pkg.sv(42) near text ; File: /inteldevstack/a10_gx_pac_ias_1_2_pv/sw/opae-1.1.2-1/platforms/platform_if/rtl/device_cfg/local_mem_cfg_pkg.sv Line: 42

 

liny_1-1665566401729.png

Are there any other steps that need to be done? Or there are more detailed guidance documents

thankyou

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JohnT_Intel
Employee
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Hi,


May I know which acceleration stack version are you using for your Arria 10 PAC?


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JohnT_Intel
Employee
469 Views

Hi,


May I know what is the acceleration stack version used?


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JohnT_Intel
Employee
436 Views

Hi,


As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.



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