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Intel Adds CXL IP to Intel® Agilex™ FPGA IP Library in the Intel® Quartus® Prime Software v22.3

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Intel has just released the Intel® Quartus® Prime Software v22.3. Among several other enhancements, Intel has added the Compute Express Link (CXL) intellectual property (IP) to the Intel Quartus Prime Software IP library. This CXL hard + soft IP builds upon the existing PCI Express (PCIe) 5.0 capabilities of the Intel® Agilex™ I-Series and M-Series FPGAs and SoCs that incorporate “R” transceiver tiles. The initial release of this IP supports CXL v1.1. A planned future IP release will provide a software-only upgrade path for these Intel Agilex FPGAs and SoCs by adding support for CXL v2.0.

Why CXL? Today’s computational workloads are larger, more complex, and more diverse than ever before. An explosion of applications in such diverse areas as high-performance computing (HPC), artificial intelligence (AI), machine learning (ML), data analytics, and other specialized tasks is driving exponential growth in the amount of data being collected and processed. Processing all this data requires vast amounts of computational power coupled with low-latency, high-bandwidth data access.

To address these demands, modern hyperscale data centers – including enterprise data centers and data centers operated by cloud service providers (CSPs) and communications service providers (CoSPs) – are adopting advanced architectural concepts such as disaggregation and virtualization. Disaggregation involves resource pooling where server shelves or entire server racks contain only CPUs, XPUs (a variety of accelerators), memory (SDRAM), or storage. Virtualization uses these resources to compose virtualized servers on-the-fly to meet the computational and memory requirements of varied workloads. Once the workload completes its task, the resources dedicated to that workload are released back into their respective pools, where they can be provisioned to future workloads. Disaggregation, virtualization, and resource pooling ease maintenance and reduce operating costs by reducing the total number of required resources in the data center and by allowing these resources to be easily assigned and reassigned on a dynamic basis.

Today, the vast majority of chip-to-chip (CPU-to-CPU and CPU-to-XPU), motherboard-to-accelerator card, and motherboard-to-NIC/SmartNIC/infrastructure processing unit (IPU) communications employ PCIe protocols. A variant of PCIe called NVMe is increasingly being used by SSDs as well. Although more recent revisions of the PCIe standard provide hardware support for I/O virtualization, they do not support cache, memory, and storage coherence, which become far more important as disaggregation and virtualization spread throughout data centers.

CXL, which is built on top of the PCIe standards, does support cache and memory coherency. CXL is still in the early stages of deployment, but it’s already starting to appear in devices such as Intel® CPUs, Intel® FPGAs, and various third-party devices. Graphics processing unit (GPU) and neural network processing unit (NPU) vendors – including Intel – all have announced plans to support CXL in the future. Eventually, CPUs, XPUs, solid state drives (SSDs), accelerator cards, SmartNICs, and IPUs will all be CXL-capable. CXL is simply the path to the data center of the future. At some stage in the not-so-distant future, Intel anticipates that CXL will become pervasive throughout data centers because it greatly improves the coherency, latency, and speed of communications among closely coupled data center resources. Intel also anticipates customers will deploy FPGAs configured as CXL bridges and switches that connect all these device pools and will also use CXL to enable additional acceleration (e.g., data transcoding) near memory and storage pools.

The advantages of CXL are already beginning to appear. Based on initial research, Intel sees a clear potential for combining benefits of acceleration for data and analytics functions with software running on host CPUs and hardware accelerators using dynamically composed servers with memory and storage pools, all facilitated by CXL.


For additional information about CXL, watch the video titled “ Intel® Agilex™ FPGA CXL IP Overview”

To start using CXL IP with Intel Agilex FPGAs and SoCs, download the Intel Quartus Prime Software.

Note: The use of Intel CXL IP for Intel Agilex FPGAs and SoCs requires an additional IP license.

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