The Intel® Quartus® 23.3 development software is now available for download and comes packed with many new features and new IP to make it easier than ever to design systems based on Intel® FPGAs.
Additions to the Intel Quartus development tools include the production version of the design netlist infrastructure (DNI), which is a new backend database that will allow for faster compilation speeds with improved features. Features built upon this new infrastructure include the RTL Analyzer, Synopsys Design Constraints (SDC) on RTL, and Early Timing Analysis.
The new RTL Analyzer incorporates several added features including:
- An object constraints viewer that allows the user to cross-probe an assignment or constraint to the source file.
- An object set console for easier object visualization by list, hierarchy, or type.
- A sweep hints viewer that displays the reasons that objects were removed during synthesis.
The SDC on RTL feature allows designers to create timing constraints using RTL netlist names instead of post-synthesis netlist names. This feature speeds the process of constraining the design because the designer can use the names assigned to nodes in a design instead of needing to figure out the new node name following synthesis.
Early Timing Analysis helps to estimate the final design timing without a full compilation, reducing the duration of this task from hours to minutes. This feature helps to identify issues that will affect timing closure earlier in the design cycle.
Additional Intel Quartus development software features include:
- Parameterizable macros for IOPLL and Clock Data Crossing IP, which allow faster compilation when changing the configuration of these IP.
- IBIS Writer support for creating IBIS models for Signal Integrity simulations on Intel Agilex® FPGAs.
Also, the new Nios® V/c Compact Microcontroller core was released with the 23.3 release. This core is the third open-source, soft processor core in the Nios V embedded processor series, providing high performance in the smallest Nios V core yet.
The Intel Agilex® 5 E-Series Virtual Platform was also released with the 23.3 software. This full-system simulator based on the Simics simulator allows designers to develop software targeting the Intel Agilex 5 E-Series Hard Processor system in parallel with doing hardware development for these FPGAs, thus reducing the development time.
Intel Quartus 23.3 development software is available for download now. Click here for more information.
