Rapid transformation across diverse markets—from edge to core to data center—requires solution providers, application developers, industries, and businesses to deliver massive innovation at unprecedented speed. This is evident at the edge as embedded devices are expected to deliver near-real-time, actionable intelligence; in the network core, with network function virtualization to aggregate and process massive amounts of data; and in data centers grappling with increasing analytics, memory and storage requirements. Essentially, data is inundating infrastructure at each critical point—from edge to core to data center. The rate of change reinforces the need for flexibility as all market sectors seek to structure and process said data. High-speed interfaces, such as Ethernet and optical transport network (OTN), are the foundation of versatile, high-bandwidth networks that can adapt and grow to your infrastructure’s constantly changing needs.
To meet this insatiable need for speed, Intel Programmable Solutions Group (Intel PSG) and Intel’s Intellectual Property Group (IPG) are excited to announce and demonstrate the world’s first 224 Gbps-PAM4-LR transceiver live at DesignCon 2023. We first announced the 224 Gbps PAM4-LR transceiver at the Intel FPGA Technology Day 2020 and have since made strides in improving the performance of our test chip and working with ecosystem partners to develop solutions with this technology. Several of our partners and customers are demonstrating their products working with the Intel 224 Gbps PAM4-LR transceiver at DesignCon 2023. We are so excited to work with our ecosystem partners and customers to put this industry-first 224 Gbps PAM4-LR transceiver to use in the most challenging applications, such as 800GbE and 1,600GbE.
Transceivers with high-speed I/O allow data to get on and off the chip very quickly. The high-speed connectivity allows processing massive amounts of data. Intel® FPGAs have increased their speeds from generation to generation: From 58 gigabits per second (Gbps) to 116 Gbps to the blazing 224 Gbps in our next generation products. 224 Gbps data rate support allows Intel products to meet the most demanding high-speed transceiver requirements in wireless, wireline, cloud, and data centers. The 224 Gbps PAM4-LR transceiver also existing and emerging protocols or standards for bandwidth-intensive applications such as Ethernet (IEEE 802.3), CEI/OIF, Interlaken, Serial Lite IV, Flex E, Fiber Channel, OTN/OTU, and >800/1600 Gbps usages.
Many markets require dense compute solutions with high-bandwidth capabilities. Edge computing and embedded require customized connectivity and low-latency compute. Data centers today need the same customization with low-latency compute for their ever-changing workloads and campus networking still needs to maximize data throughput while accelerating network workloads. In addition to these markets, our new 224 Gbps PAM4-LR transceiver is designed with an analog-to digital converter (ADC)/digital-to-analog converter (DAC) digital signal processing (DSP)-based serializer/deserializer (SERDES). The new transceiver is optimized for operation on channels in supporting chip-to-module (C2M) very short reach (VSR), chip-to-chip (C2C) medium reach (MR), backplane (KR), and passive cable (CR) long reach (LR) for Ethernet, as well as other relevant standards such as OIF-CEI to meet the needs of multiple markets and applications.
Intel PSG has had leading-edge transceivers in the industry for three-consecutive generations, including 116 Gbps transceivers that are supported in Intel® Agilex™ 7 FPGAs. We are committed to extending our leadership FPGAs to include support for the world’s first 224 Gbps PAM4-LR transceiver in our next generation Intel Agilex FPGAs.
For more information on the 224 Gbps PAM4 transceiver ecosystem see below:
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