Intel Agilex® 5 FPGA SoCs are heading your way and a new version of the Intel® Simics® Simulator for Intel® FPGAs will help software development teams get a jump on writing code for these devices. The Intel Agilex 5 FPGA SoCs have an all-new Hard Processor System (HPS), consisting of a dual-core Arm Cortex-A76 and a dual-core Arm Cortex-A55 processor, integrated with a system memory management unit that enables system-wide hardware virtualization through a unified memory model. The design of the HPS allows hardware virtualization to be extended to peripherals instantiated in the FPGA SoC’s programmable-logic fabric and the creation of a Virtual Platform for early software development, sometimes called a “shift left” approach, which reduces the total time needed to develop and test new products.
The Intel Agilex 5 HPS represents an upgrade to the HPS incorporated into Intel Agilex® 7 FPGA SoCs. Each Arm Cortex-A76 processor has 64-Kbyte instruction and data caches, and a 256-Kbyte Level 2 cache. Each Arm Cortex-A55 processor has 32-Kbyte instruction and data caches, and a 128-Kbyte Level 2 cache. The Arm Cortex-A76 and -A55 processors have maximum clock rates of 1.8 and 1.5 GHz respectively and the four Arm Cortex processors in the HPS cluster share a 2-Mbyte Level 3 cache. The dual-core Arm Cortex processors can be used in a Big/Little (A76/A55) configuration.
The HPS integrated into Intel Agilex 5 FPGA SoCs also includes an expanded set of I/O blocks in its peripheral subsystems including three improved Ethernet MACs with support for 1-Gbps Ethernet and hardware support for IEEE-1588 Time Sensitive Networking (TSN), upgraded NAND Flash and MMC memory controllers with integrated DMA controllers, USB 3.1 and USB 2.0 ports, multiple I2C and I3C ports, UARTs, and four SPI ports. The Intel Simics Simulator for Intel FPGAs models all these I/O components and allows the software development team to shift its development cycle to the left by an estimated six to nine months. That’s time that can be used to add features and improve software quality.
The HPS architectural improvements embodied in the Intel Agilex 5 FPGA SoCs allow these mid-tier devices to address numerous embedded markets including:
- Wireless communications
- Wireline communications
- Datacenter acceleration
- Industrial applications
These types of applications require significant software development that’s built upon large software stacks. The Intel Agilex 5 FPGA SoCs are currently supported with an open-source Linux operating system stack available at the Linux Kernel Archives (kernel.org), where it will receive long-term support. Intel is also supporting an RTOS based on the Linux Foundation’s Zephyr Project. The TSN software stack for the Intel Agilex 5 FPGA SoCs supports both the Linux operating system and the Zephyr Project’s RTOS.
Create a Virtual Platform for Software Development
From a software perspective, virtual platforms built with the Intel Simics Simulator for Intel FPGAs allow the hardware/software integration that has traditionally relied on FPGA prototypes to start earlier, which reduces development risk and cost. Software development using a virtual prototype uses the same familiar tools used when programming the actual hardware, including compilers, debuggers, and simulators. However, a virtual prototype gives software developers deeper insight into the internals of a design by providing access to hardware internals for added visibility and enables fault injection, which permits more thorough testing of the hardware/software design.
The Intel Simics Simulator for Intel FPGAs runs on a host PC and simulates the target hardware. Because the virtual prototype requires no physical hardware, the prototype runs entirely on a PC, virtual platforms can be distributed to development teams globally, which can greatly increase the software team’s development efficiency and throughput.
Virtual platforms created with the Intel Simics Simulator for Intel FPGAs are not restricted to simulating just the HPS in the FPGA SoC. With the appropriate simulation models for other components instantiated in the FPGA SoC and for components attached to the FPGA SoC, the simulator can operate as a Virtual Platform that serves as a software-based development environment for the entire design. Thus, the Intel Simics Simulator for Intel FPGAs allows multiple software-development groups to write code without the need to provide these groups with working prototype hardware. A Vitual Platform is both less expensive and easier to distribute geographically, when compared to using hardware prototypes.
Further, all the simulation models for the Virtual Platform need not be ready before software-development work begins. The software team can start with the HPS simulation and can add software modules through subsequent Virtual Platform releases when the appropriate simulation models are ready. This process allows software development to start earlier in the design process and to keep in lockstep with the hardware design as it unfolds.
The Intel Simics Simulator for Intel FPGAs has been in the hands of early access customers since Q1 of 2023, learn more here.
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