Be on the lookout in Intel® Quartus® 23.3 for Ethernet and Memory IP Subsystem support. In efforts to continue to improve customer ease of use, creating IP Subsystems allows our customers to easily configure complex subsystems with a simple-to-use menu-driven user interface.
Ethernet Subsystem IP is now available in Intel Agilex® 7 F&I series FPGAs, the first Intel FPGA family to publicly offer this support. Customers now can create Ethernet Subsystem designs, simulate the configuration, and run these designs on supported development kits or their own hardware. The subsystem user interface will help customers keep track of complex configurations of Ethernet ports and their desired features. Ethernet subsystem tutorial videos will follow on intel.com in the coming months.
Memory Subsystem IP support is also available in 23.3. Memory designers can now leverage the benefit of a simplified and faster process of instantiating multiple external memory interfaces. Memory Subsystems support up to 8 content addressable memories, transforming data management with a high-speed hash table structure and improving External Memory Interface (EMIF) performance with the inclusion of extra soft logic. Be sure to check out our memory subsystem tutorial videos to jumpstart your design today!
As we continue to listen to our customers’ desires to move quickly toward TTM and make development tasks easier, the use of IP Subsystems accomplishes just that.
Intel® Quartus 23.3® development software is now available. Download Now.
