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Intel Labs Presents Quantum Circuit Optimizations at IEEE Quantum Week

ScottBair
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Scott Bair is a key voice at Intel Labs, sharing insights into innovative research for inventing tomorrow’s technology.

Highlights:

  • This year’s IEEE International Conference on Quantum Computing and Engineering (QCE), or Quantum Week, runs from September 17–22, 2023, in Bellevue, Washington.
  • Intel is proud to be a silver sponsor of IEEE Quantum Week 2023.
  • Intel researchers share a new framework for quantum circuit optimizations and its evaluation using the Intel Quantum SDK.

 

This year’s IEEE International Conference on Quantum Computing and Engineering (QCE), or Quantum Week, runs from September 17–22, 2023, in Bellevue, Washington. The event aims to bridge the gap between the science of quantum computing and the development of an industry surrounding it. Intel is proud to be a silver sponsor of the conference, and to be contributing some of its latest quantum circuit optimization research. Intel researchers will share the Pauli-based Circuit Optimization, Analysis, and Synthesis Toolchain (PCOAST), a new framework for quantum circuit optimizations. Researchers will also share the results of their evaluation of the PCOAST optimization subroutines using the Intel® Quantum SDK.

To learn more about optimizing quantum circuits with PCOAST, read the abstracts below.

 

PCOAST: A Pauli-based Quantum Circuit Optimization Framework

This paper presents the Pauli-based Circuit Optimization, Analysis, and Synthesis Toolchain (PCOAST), a framework for quantum circuit optimizations based on the commutative properties of Pauli strings. Prior work has demonstrated that commuting Clifford gates past Pauli rotations can expose opportunities for optimization in unitary circuits. PCOAST extends that approach by adapting the technique to mixed unitary and non-unitary circuits via generalized preparation and measurement nodes parameterized by Pauli strings. The result is the PCOAST graph, which enables novel optimizations based on whether a user needs to preserve the quantum state after executing the circuit, or whether they only need to preserve the measurement outcomes. Finally, the framework adapts a highly tunable greedy synthesis algorithm to implement the PCOAST graph with a given gate set.

PCOAST is implemented as a set of compiler passes in the Intel Quantum SDK. In this paper, researchers evaluate its compilation performance against two leading quantum compilers, Qiskit and tket. Results show that PCOAST reduces total gate count by 32.53% and 43.33% on average, compared to to the best performance achieved by Qiskit and tket respectively, two-qubit gates by 29.22% and 20.58%, and circuit depth by 42.02% and 51.27%.

Optimization at the Interface of Unitary and Non-unitary Quantum Operations in PCOAST

The Pauli-based Circuit Optimization, Analysis and Synthesis Toolchain (PCOAST) was recently introduced as a framework for optimizing quantum circuits. It converts a quantum circuit to a Pauli-based graph representation and provides a set of optimization subroutines to manipulate that internal representation as well as methods for re-synthesizing back to a quantum circuit. This paper focuses on the set of subroutines which look to optimize the PCOAST graph in cases involving unitary and non-unitary operations as represented by nodes in the graph. This includes reduction of node cost and node number in the presence of preparation nodes, reduction of cost for Clifford operations in the presence of preparations, and measurement cost reduction using Clifford operations and the classical remapping of measurement outcomes. These routines can also be combined to amplify their effectiveness.

Researchers evaluate the PCOAST optimization subroutines using the Intel® Quantum SDK on examples of the Variational Quantum Eigensolver (VQE) algorithm. This includes synthesizing a circuit for the simultaneous measurement of a mutually commuting set of Pauli operators. Results show for such measurement circuits, the overall average ratio of the maximum theoretical number of two-qubit gates to the actual number of two-qubit gates used by the method to be 7.91.

About the Author
Scott Bair is a Senior Technical Creative Director for Intel Labs, chartered with growing awareness for Intel’s leading-edge research activities, like AI, Neuromorphic Computing and Quantum Computing. Scott is responsible for driving marketing strategy, messaging, and asset creation for Intel Labs and its joint-research activities. In addition to his work at Intel, he has a passion for audio technology and is an active father of 5 children. Scott has over 23 years of experience in the computing industry bringing new products and technology to market. During his 15 years at Intel, he has worked in a variety of roles from R&D, architecture, strategic planning, product marketing, and technology evangelism. Scott has an undergraduate degree in Electrical and Computer Engineering and a Masters of Business Administration from Brigham Young University.